Bus interfaces are used in computer systems to connect a common system bus to particular computer system elements, such as microprocessors, memory devices and input/output ("I/O") devices. The bus interface permits these elements to communicate with one another over the common system bus.
The computer system may contain a separate bus interface for each system element. In such a case, all signal lines between an element such as this and the system bus pass through the associated bus interface. The combination of a system element and its bus interface is often referred to as a module.
Bus interfaces may be implemented on an integrated circuit ("IC") chip. However, the number of pins on the interface IC chip for connection to computer elements is limited. For example, a bus interface IC chip may not have enough control and data input pins to receive all of the control and data signals output from a microprocessor.
The conventional approach to solving this problem has been to separate the design of the bus interface into multiple sections, or slices, with each slice handling either control functions or data-path functions. Typically, one slice, which is implemented on a single IC chip, handles all of the control functions, that is, receives all of the control signals from a microprocessor.
A slice for interfacing data paths may receive either the entire set of data signals or a subset of the data signals, for example, from a microprocessor. Once again, each slice is implemented on a single IC chip so that if one slice receives the entire set of data signals, only one IC chip is necessary. If, on the other hand, each slice receives a subset of the data signals, a number of IC chips are needed. Therefore, at least two unique designs are required to implement a bus interface using the conventional approach: one design is for control signals and one is for data-path signals. Because of the necessity of two different designs, design and manufacturing costs are relatively high.
Moreover, using this conventional approach, intermediate control lines are required to connect the control slice to each of the data-path slices. Also, circuits are needed for controlling the data-path slices and for providing proper synchronization between the control and data-path slices. Because each slice may be implemented on a separate IC chip, the intermediate control lines must leave the control slice IC chip and then connect to the data-path IC chip. Because this type of signal transmission is far slower than signal transmissions on a single IC chip, bus interface performance is not optimized for a given IC technology.
If a large number of data-path slices are used to implement a bus interface, the load on the intermediate control lines will be high. As a result, specially designed circuits are necessary for each design to manage this increased loading. This heavy loading also significantly reduces the performance of the bus interface. This reduction in performance is magnified as the size of the bus is increased in width. It is therefore very difficult to create a truly scalable bus interface.
The present invention solves these and other problems as set forth in the remainder of the specification and as shown in the accompanying drawings.